1. Field of the Invention
The present invention relates generally to a method of monitoring alignment marks on a substrate and, more particularly, to a method of monitoring alignment marks on a substrate during a semiconductor fabrication process.
2. Description of the Prior Art
Photolithography is a process commonly used in semiconductor fabrication for selectively removing portions of a thin film from or depositing portions of a film onto discrete areas of a surface of a semiconductor wafer. A typical photolithography process includes spin coating a layer of a light-sensitive material (commonly referred to as a “photoresist”) onto the surface of the semiconductor wafer. The semiconductor wafer is then exposed to a pattern of light that chemically modifies a portion of the photoresist incident to the light. The process further includes removing one of the incident portion or the non-incident portion from the surface of the semiconductor wafer with a chemical solution (e.g., a “developer”) to form a pattern of openings in the photoresist on the wafer. Subsequently, portions of the thin film on the surface of the semiconductor wafer can be selectively removed from or deposited onto the surface of the wafer through the openings of the photoresist mask. The photolithography process can be repeated to form layers of microelectronic features on or in the semiconductor wafer.
In the foregoing process, a new pattern must be aligned with patterns already on the semiconductor wafer before exposure. If the alignment of the new pattern is inaccurate, the new pattern may overlap and/or otherwise interfere with existing patterns on the semiconductor wafer to render the formed features inoperable. As a result, the alignment accuracy can directly impact product yields of the photolithography process. In addition, in order to accurately align the new pattern with the patterns already on the semiconductor wafer, several alignments marks on the semiconductor wafer are used during the alignment. The individual alignment marks can include a trench, a grating, a circle, a square, and/or other suitable pattern on the microelectronic wafer.
Moreover, the photolithography processes as well as other suitable fabrication processes such as an etch processes, a deposition process, an implantation process and so forth are carried out until final electronic devices are produced. During the fabrication processes, the stress in films deposited on the semiconductor wafer is often generated, which may cause the change in the topography of the semiconductor wafer and shifts in the position of the alignment marks. This drawback apparently affects the alignment accuracy of the photolithography process.